- Chris Bergen, CTO 
“Mirabilis
Design’s focus on providing tools for FPGA architects to increase
confidence in the architecture and eliminate design bottlenecks aligns
with the goals of our ESL Initiative. Virtual prototyping of FPGA
platforms using VisualSim can enable customers to optimize their
specification to achieve the required performance, minimize system
power and maximize functionality.”
- Steve Lass, Sr. Director of Marketing 
“Using
VisualSim at Vitesse, we have been able to introduce an architectural
design phase into the design flow with minimal disruption and an
accelerated response time. Using the VisualSim Verilog verification
suite, the RTL verification can now be tied to this system design, thus
providing a closed-loop operation. Other solutions are too laborious,
required knowledge of object-oriented software constructs and required
a long learning curve for hardware designers. The specification phase
is extremely short and VisualSim provides us a mechanism to eliminate
system bottlenecks and validate the architecture within this time
schedule.”
- Colin Paterson, Design Center Director 
"We
modeled the internal pipeline of the Network Packet Search Engine at a
fairly detailed level of abstraction. In summary, we found that their
(the VisualSim) visual modeling technique did indeed save time, and
certainly provided a better and more intuitive level of
documentation. We successively replicated the functionality of our
original SystemC model, ran it and extracted useful performance
information in a significantly shorter time than we felt it would have
taken to hand-code a similarly detailed model.
The tool [VisualSim] provides a pretty comprehensive set of library building blocks, as well as
statistical and vector-oriented traffic generators, and probes/displays, so a lot of modeling
"grunt work" is taken care of.
In short, if you are in the market for investigating GUI-based architecture/systems
performance-modeling tools, I think this one is well worth a look."
- Senior Fellow 
“This
[specification and early performance analysis] information is critical for all our programs. I don't
know of any other program [besides VisualSim] that can give us this information.”
- Systems Engineering
Program Manager 
“I
see how parameterized blocks can
be very powerful. This is really
the tool I needed for my last project.”
- Multimedia Processor
Program Manager 
“This would save substantial
amount of time that we currently
spend in writing and debugging C
code”
- Technical Lead 
“I
was really impressed with VisualSim.
Mainly with regards to the fact
that the tool will let me focus
on design aspects of the system
under investigation rather than
the mechanics of formulating the
model.”
- Research Fellow 
“After
having worked with different algorithm
level tools like COSSAP, SPW and
Ptolemy, your concept of combining
analog, DSP and digital electronics
on system level looks really innovative
to me.”
- Senior Processor Architect 
"Boeing is always looking for ways to increase
systems engineering productivity, enable greater levels of collaboration across
design teams and achieve greater technical innovation. Using VisualSim from Mirabilis
Design, engineers can focus on design exploration without worrying about the
underlying simulator and programming low level of components. VisualSim provides three valuable
capabilities for Boeing: common modeling mechanism for systems engineers,
hardware and software designers; graphical depiction for demonstration and
design review; and scalability to support very large systems."
- Chief Systems Engineer 
