| Demonstrations |
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Mirabilis Design provides performance analysis, power estimation and architecture exploration
solution for the design of electronics and real-time software. The product, VisualSim, is a graphical modeling and simulation environment. Models of
the proposed system are constructed by engineers in VisualSim using pre-built parameterized modeling library and custom-code blocks using C/C++/Java/SystemC/Verilog/VHDL.
Hardware and software Designers and
system architects can conduct trade-off studies by varying parameter values, executing different input traffic stimulus and modifying the system
configuration including the topology. The parameterized libraries contain traffic generators, statistics viewers, processing flows, resources, architecture components
and application-specific functions. The outputs from VisualSim are a highly optimized design, executable specification and virtual platform to verify
implementation.
One of the biggest advantages of using VisualSim is the ability to communicate the pre-built models using Web Browsers. This means that models
can be viewed and simulated from within Web Browser. The links below show the application of VisualSim in a variety of markets and industries.
This is not a exhaustive list and does not propose to show the capability of the entire package.
The examples contained on the pages linked below demonstrates the model construction and trade-off possibilities in VisualSim. User can experience
VisualSim by clicking on the model links. The leads to a new Browser page that instantiate a pre-built VisualSim model to display and execute within
the Web Browser. The user can click on an icon in the graphical model to view the parameters. Click on "GO" button to start the simulation.
Double-click on names (model parameters) in the model view, change the values and execute the simulations.
VisualSim Architect, the desktop application, was used to construct these models. Over 350 additional models are shipped with VisualSim. To
experience model-based design using VisualSim, request for an Evaluation or send us an
email.
Java
Runtime Environment is required to view
the Demonstrations,
To
download click here
 
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Aerial
Combat Sensor Project : This
model analyzes several trade-offs
in reconnaissance aircraft hardware
configuration and evaluates the impact
of re-transmission on sensor latency
for data transmitted from aircraft
sensor platforms to the Distributed
Common Ground System (DCGS).
This is an example of modeling and
analyzing large systems such as aircraft
and machinery to evaluate performance
based on a number of hardware, software
and control system criteria.
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Unmanned Aerial Vehicle
This model uses VisualSim software to conduct trade studies on the architecture
of the processing Sub-systems and to select the best Bus. The system prototype
combines existing components available in VisualSim model library to assemble
the sensors, on-board multi-blade processing units, wireless channels and the
operation of a ground vehicle. These processing Sub-Systems and the wireless
channels are connected together over a 1553B Bus. Each Datalink processes
messages from a number of sensors and transmits the results across the 1553B Bus
through a common set of transmitters to ground vehicles.
- 2-D
Helicopter Control System : This
system models a high-altitude take
off motion of a helicopter with a
hierarchical state machine controller.
The control uses approximate feedback
linearization and pole placement.
- Data
Acquisition System for an Industrial
Application : (Developed
for SNS, US Dept. of Energy and Lawrence
Berkeley Labs) Design a high performance
data acquisition system using a Linux
system and custom PCI data control
card. Card consists of 4 DMA
channels, ASIC, cache, memory and
FPGA for sensor detection, parsing
and data processing.
- Lorenz
Attractor :
This is a model of a nonlinear feedback
system in continuous-time which exhibits
chaotic behavior in the form of an
unstable periodic orbit
Wireless
- WLAN-
802.11 : This model
accurately describes the 802.11 MAC
implementation. In addition,
it also provides the hooks required
to add emerging Physical layer implementation.
This model contains all the
802.11 signaling, transmitter, receiver,
nodes and Access Point. This
also handles packet fragmentation.
The model is fully parametereized
for the user to modify and run additional
scenarios.
- Bluetooth
: This model
is timing and signal accurate implementation
of a Master-Slave Bluetooth implementation.
All of the details described
for the Wireless LAN above are equally
applicable here.
- Channel
Modeling : This
model studies the impact of a communication
channel on a simple protocol called
stop-and-wait. The next packet
is not sent until acknowledgment is
received from the earlier packet.
- Encoder
& Decoder : This
model has custom-coded implementation
of the Viterbi Decoder and Convolution
Encoder. The results are plotted.
- A/D
Converter :
Implements a Sigma-Delta A/D Converter
with a second order sub-system.
Network
and Protocol
- SPI-3
Interface : This
models the Physical-Layer to Link-Layer
part of the SPI-3 for a 32-bit interface.
- Route
Optimization System :
Explore the changes in the routing
table when a link is dynamically a
added or removed. The performance
impact and the use of connectionless
modeling methodology is described
through this design.
- TCP/IP
Modeling :
This model studies the impact of the
packet retry rate on protocol buffering
at different points on the network.
The network is built with various
nodes having different number of layers
of the protocol stack implemented
in detail (MAC, TCP and IP layers).
- Verify
Server Implementation on a Network
System : The system optimized
in the Dual Processor Architecture
is introduced into the TCP Protocol
Stack system as the implementation
of one of the router nodes on the
network. The traffic and hardware
sizing are maintained similar to the
previous case. The results show
that there is difference in the performance
graphs of the system when analyzed
in isolation than when studied with
the environment.
- A/D
Converter : Implements
a Sigma-Delta A/D Converter with a
second order sub-system.
Computing
- Dual
Processor Server:
Optimize an enterprise server with
dual processors and bus architecture
for component sizing and arbitration
algorithms.
Semiconductors
- Functional
Processor Model :
This is the first level processor model. Processor is defined using queue as a pipeline, instruction set, simple execution unit, bus requests, latency,
queuing and contention. There are reusable blocks of bus port, arbiter and bridge.
- Functional
Cache Model :
Models a functionally and timing accurate L1 and L2 cache
architecture with a variety of standard parameters including
prefetch, pre-load, N-Way Associative, Replacement Policy, Lines,
Tags and Index. This model uses the ARM-1136J (F)S trace files.
- Crossbar
Switch Chipset : Architect
a , high bandwidthmultiple port IO
System connected to a Switch Cloud
Chipset through a bridge. Switch
cloud is attached to multiple of CPUs,
Cache, DMA and others.
Imaging
- MPEG
:
This Model demonstrates MPEG Frames
entering, being sent to a Memory,
bus, cache/processor and bus.
The cache/processor is based on whether
it is video, or audio type frame.
No cache hit or miss in this model
- DCT
:
Design of a system containing a DCT
and IDCT for algorithm evaluation.
- Video
Capture : This
model captures live video feed from
a video camera for use in a simulation
model.
Digital
Signal Processing
- Fixed
Point FIR Filter :
This model exploits the fact that
the FIR filter block in VisualSim
is data type agnostic to feed it fixed-point
numbers and fixed-point coefficients.
Automotive
-
FlexRay
Bus System :
Mirabilis Design provides a modeling and simulation
environments around the FlexRay and CAN bus network
architectures. This tutorial explains the
operation of FlexRay in general
and to use the VisualSim model to analyze different
conditions. The link provided helps the
user to fall through using the model Applet. This
link opens a separate Web Page where the interactive
FlexRay model will appear. The user can click on the
icons of the communication channel, nodes, star and the
top-level parameters, modify them and execute the
simulation. This will enable the user to study impact
on their architectures and to optimize the FlexRay parameters.
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Anti-Lock
Braking System with Rollover Prevention
Evaluating the architecture
of the shared 1553B or CAN Bus for
connecting the Wheel sensors, Engine
Tasks and the Engine Control Unit
(ECU). Analysis is based on
engine RPM, road conditions (Coefficient
of friction), engine tasks priority
and the sensor polling rate
- Car
Transmission :
The input to hybrid system are the
current applied gear and the current
throttle position. The efficiency
function determines the amount of
the engine's power that is available
to accelerate the vehicle.
- Car
Tracking :
This model shows a following
car tracking a leading car in an
unreliable communication environment.
The following car modifies
its travel path based on the information
from the leading car about its position,
speed, acceleration, and a time
stamp for this information.
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