VisualSim

VisualSim is a systems engineering solution for the design, analysis and validation of the system specification from a concept.  This graphical environment is used to construct distributed, networked systems and high performance semiconductors such as SoC and FPGA.  The environment is used to architect the hardware, software and the communication interfaces between the sub-systems. 

The models are used to optimize the architecture, develop a detailed specification; and generate the test benches and assertions for verification. The models are simulated using a highly optimized SystemC-like simulator to conduct performance, power and functional trade-offs.

Models of the proposed system are constructed by engineers in VisualSim using pre-built, pre-compiled, parameterized modeling library provided by Mirabilis Design. These blocks have been highly optimized for simulation performance, have over 3000 pre-defined reports and are pre-compiled to reduce development time. 

Users can also create custom components or import existing one's written in C/C++/Java/SystemC/Verilog/VHDL. Thee models can be constructed at all Transaction Levels (TLM 3, 2 and 1). Designers and architects can conduct trade-off studies by varying parameter values, running different stimulus and modifying the system configuration including the architecture.

The parameterized libraries contain traffic generators, statistics viewers, behavior definition language, performance resources, accurate hardware components and application-specific algorithms. The output from VisualSim is a highly optimized design and virtual platform to validate the requirements, verify implementation and provide the stimulus for verification. 

Simulation model can be embedded within documents for remote simulation execution and analysis from within a Web-Browser without a requiring a software download. 

The advantage of using VisualSim is the speed of model construction, ease-of-learning, rapid trade-off and uniform communication across the entire organization. 

For example, a model of a 3G SoC with multimedia extensions can be construction, validated and analyzed for performance and power in less than a month. Similarly a model that analyzes the power trade-off for the use of different hardware technologies in a multi-satellite network can be constructed within a week.

Core Products List

VisualSim Architect  is the graphical desktop application used to construct models, execute simulation and conduct trade-offs. VisualSim Architect contains a complete suite of modeling libraries, simulation engines, XML database, report generators and graphical debugging tools. For information on standard modeling libraries available with VisualSim Architect, click here.

VisualSim Explorer  is a Web Server that enables users to embedded models in documents for access, simulation and analysis by remote users from within a Web Browser. This way, models originally constructed using both VisualSim libraries and custom C or SystemC modules can be communciated to non-modelers and non-programmers.

Libraries and Toolkits (Requires VisualSim Architect)

VisualSim Script  is a scripting language for constructing algorithms, defining logic, managing power and generating statistics. The library contains a large collection of built-in functions and methods.  

VisualSim Architecture Modeling Toolkit  provides generators for constructing instruction- and cycle-accurate models of processors, multi-cores, memories and other peripherals.  The Toolkit includes vendor processor models, processor generator to create other custom, standard and application-specific processors, CPU bus, cache, Memory controller, DRAM, SDRAM, SRAM and Flash. Using this library, a standard or proprietary processor can be modeled in less than 4 hours using a Excel spreadsheet, product datasheet and without any programming. The generated model can execute software code and is used for architecture exploration.

VisualSim Bus Switch and Controller Toolkit provides generators for buses, controllers, switches and other control-dominated hardware.  These include shared, point-to-point, request-acknowledge and ring buses; DMA, memory and I/O controllers; and bridges, switches and meshes. Using numeric parameters to alter the performance and power characteristics, these generic blocks can be customized by the user to create standard and proprietary technologies.  Model attributes include arbitration algorithm, number of channels, speed, burst size and width.

VisualSim Xilinx FPGA Modeling Toolkit  contains models of hard and soft IP/cores that are available on the FPGA platforms. These include PowerPC, MicroBlaze, DMA, Memory Controllers, SDRAM, CoreConnect (PLB and OPB), FSL-Bus, Block RAM and APC.

VisualSim Bus Standard Toolkit  contains models of Industrial, Networking, Computing, Aerospace and Automotive bus and switching standards. There are are over 30 buses included in this library.  These include PCI, PCIx, PCIe, Rapid I/O, AMBA 2.0, AMBA 3.0, CoreConnect (PLB and OPB), FlexRay, CAN, Ethernet Port and Ethernet Switch, VME, SPI 3.0 etc.

VisualSim Application Toolkit  is a collection of modeling components that are focused on applications markets. These include Networking, DSP, Communications, imaging, and wireless/ sensor networks.

VisualSim Power Modeling Toolkit  is a power estimation solution that dynamically computes the instantaneous, average and discharge for individual components and the entire system. No programming or coding is required from the user to view the results.

VisualSim SystemC  is a SystemC extension to VisualSim Architect to construct models using SystemC modules. Models containing custom SystemC components can be simulated with the pre-built VisualSim modeling to accelerate model development and conducting trade-offs to be constructed and simulated within VisualSim Architect.

VisualSim Verilog  cosimulates with industry-standard Verilog simulators.

VisualSim STK  cosimulates with Satellite Toolkit 7.1 for dynamic orbital exploration.