Functional Validation
- Validate full system operations and generate system requirements/ constraints
- Gain operational understanding of the system
- Verify dependencies and completeness of functional flows
- Inject errors to determine effects, response time for redundanct systems and relaibility
Performance analysis
- Size buffers and set thresholds of the schedulers, processing resources and FIFO
- Measure overall latency and effective throughput
- Impact of protocol overhead, packet extraction and compression efficiency on throughput
- Evaluate the interoperability with other network and wireless protocols
System-level Power Exploration
- Determine the relative power consumed between various implementations
- Rate of electrical discharge for different combination of application usage
- Power discharge based hardware-software partitioning
Compare the implementation on different Hardware Platforms
- System resource usage and required sizing
- Performance characteristics such as latency, cycle count and power (mW)
- Various implementation options for datapath and control (Multi Processor vs. DSP)
- Trade-off platforms, processor, DSP, co-processor and hardware acceleration
- Functional flow validation based on board-level signals
Bottleneck identification using Architecture Exploration
- On-chip vs. Off-chip processing using custom or standard buses and interfaces
- Memory hierarchy performance for different traffic input and application operation
- Performance delta between DMA vs. hardware based synchronization for data prefetch
FPGA Design Exploration
- Distributing Layer 3 switch operations across multiple PowerPC, Fabric, and MicroBlaze
- Trade-off external PowerPC vs. PowerPC core using Core-Connect memory interface
- Size block RAM for complex DSP applications
Software design
- Thread allocations and load balancing
- Tuning RTOS and device driver attributes based on data dependencies and parallelization
- Validate interactions across multi-layer bus for acknowledgements and interaction
