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      Modeling Technology Backgrounder

As the reliability of individual hardware and software components increases, system failures are more common. System failures occur in the interaction of components (hardware, mechanical and human) rather than the failure of an individual component. Most failures are related to flawed requirements and design constraint-not implementation errors.

  Technology Requirements
  Industry Need
  Customer Communication
  VisualSim
  Flow Description

  Time-to-Market Advantage

 


 

Technology Requirements

The non-deterministic nature of today's computer systems require a knowledge of the operating environment, interrupts handling and incoming data. A design process requires planning, analysis and optimization at the system-level before implementation. To solve localized and macro scenarios, it is essential to validate system specifications against extensive transaction patterns, applications and standard benchmark. Current solutions to evaluate these are based on rough estimates or creating time-consuming C-based models. The addition of a solution to evaluate and model the performance and architecture of the system can validate design assumptions that will otherwise be identified during development, testing or customer-use.

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Industry Need

The combining of electronics, hardware, electro-mechanical and software within a single product requires architects and designers to perform analysis in multiple knowledge areas. This forces the designer and architects to learn multiple tools, write non-reusable C-code or make best-estimates. Moreover, there is a need for a single platform to evaluate domains and their dependencies. The cost of owning and maintaining multiple tools can overwhelm most operational budgets and staff.

Most of today’s project teams are distributed and interpretations of design specifications are based on domain knowledge and language interpretation. The lack of proper hand-off between teams requires constant physical interaction or major untested assumptions creep in. Hence, even high quality implementation leads to non-conforming products that miss market window or requirements or both.

Customer Communication

Every company's Web site has reference block diagrams or graphical descriptions highlighting the unique capabilities and differentiated value. Marketing folks are challenged by the static nature of these diagrams. Architects create models of the system that explore the key values. The combining of the engineering models with the marketing needs can make a very powerful selling tool for companies either right over the Web or as a tool for Application Engineers.

VisualSim

Mirabilis Design’s VisualSim is the first system-level solution that designs, optimizes and validates the architecture of systems, sub-systems, components and embedded software within a single framework. VisualSim accomplishes this at a higher level of abstraction and visualization through platform-independent technologies. The product focuses on accelerating modeling and simulation, IP reuse and propagation of an executable simulation as specification. VisualSim is used for architecture and performance analysis of hardware, digital ICs and embedded software. The innovative methodology provides continuity from marketing-to-implementation, thus bridging the gap that is the major cause of product failure. The solution includes an innovative modeling library, easy applications characterization and scenario generation to explore system behavior, performance and power consumption.

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VisualSim Design Methodology
Figure 1: VisualSim Design Methodology


Flow Description

The standard VisualSim flow starts at an abtract-level and continues by the addition of details and refinements. The final model can be used for test vector generation, validation of the implementation and for communication with customers. The diagram in Figure 1 explains the activity. VisualSim represents the industry’s first Top-Down methodology to address full product exploration and optimization at the system-level. VisualSim can combine various abstraction-levels and analysis needs within a diagram.

  • A DSP designer can study the impact of the PHY layer on throughput and BER due to TCP error correction algorithms by running actual network traffic before implementation.
  • Acceptable response time for the zoom-in and zoom-out operations for the lens
  • Analyzing the CPU pre-fetch and memory bus controller on software tasks
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Performance Analysis: At beginning of every project, feasibility studies are performed to validate requirements and determine system constraints. System constraints are expected product cost, performance requirements, key component selection and other functional boundaries.

  • Evaluate the performance merits between an ARM and MIPS processors
  • Determine if L3 cache is required based on a statistical traffic model
  • Number of cycles consumed for read or write operation

Functional Analysis: The various algorithms that make up the system are designed using the high-level guidelines generated in the requirements phase. These algorithms can be designed with VisualSim or results imported from MatLab, Excel or SPW. To ensure that these algorithms will function to customer requirements, they need to be validated in the high-level system model. The types of algorithms developed in this phase include MPEG decoder, TCP protocol stack, power management and OCR algorithms. Some of the explorations include,

  • Impact of a noisy channel and TCP retransmission on the PHY and HDTV algorithms
  • Ordering of instructions on DSP to meet performance and power constraints
  • Response time for airbag sensor operation based on FlexRay bus node priority

Architecture Analysis: With the product specification and the algorithms in place, the architecture, and partitioning into hardware, software, ASIC and electro-mechanical must be defined. The key optimizations performed include,

  • Bus widths, CPU speed, memory and cache controllers, disk and I/O interfaces
  • Determine queuing delay created by adding an additional pipeline stage for decoder processing
  • Cost and power constraints to attain performance goals determine HW/SW implementation

Verification Environment Creation: The transaction or cycle-accurate models defined at the architecture-phase can be used for test vector generation. In addition, the model can be used for block-level debugging by comparing the input/output combinations. Finally the model can be used for performing system-level refinement validation.

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Time-to-Market Advantage

Currently performance analysis and system architecture solutions are restricted to C-code and spreadsheet-based analysis. The VisualSim solution brings some very significant advantages over these approaches. The ability to perform end-to-end system design and validation creates the lowest cost and highly differentiated product while minimizing technology risk. This dramatically increases engineering productivity, reduces operational cost and ensures a competitive product, thus bringing more profits to the firm.

  • Increase profit-margin by optimizing the design for the customer requirements and not over designing to support assumptions.
  • Mitigate risk by validating the architecture of the full product early in the cycle as opposed to sub-system implementation verification late in the cycle.
  • Reduce project over-runs and costs by evaluating feasibility before commencing on a project and by utilizing a single system design product.
  • Implement a structured IP reuse methodology by utilizing the pre-fabricated building blocks with associated documentation without resorting to complex code that is not easy to hand-off.
  • Ensure uniform communication by sharing an executable specification rather than verbal and text documents that are subject to interpretation.
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