VisualSim
Users
Introduction
VisualSim is the first software
solution to combines system-level
activities into one platform, thus
enabling sharing, reuse, higher
interaction and technology transfer.
The use of early architecture validation
through modeling and simulation
ensure identification of design
deficiency and eliminates surprises
at implementation. The environment
can combine hardware, software,
digital, analog, DSP and protocols
to perform system coverage analysis
for performance and functional trade-offs
on the full- or sub- system.
VisualSim users are performance
engineers, system architects, protocol
designers, Algorithm designers,
embedded engineers and project managers.
Performance
and Analytical Engineering
Performance engineers can conduct
feasibility studies at an abstract-level
without reference to the underlying
implementation. The solution
Figure 1 Model of
a Processor Stall Algorithm
|
combines
queuing theory, analytics and traffic
modeling. VisualSim provides interfaces
to Excel for easy import of traffic
traces and current analytical models.
Systems Engineers and Architects
Architects are responsible for the
translation of concept into hardware,
software, IC and mechanical entities. Analysis
is conducted for performance, functional,
environmental interference and system
compatibility. VisualSim enables
creation of custom user-interfaces
for demonstrations and plots
Figure 2 Mapping instruction
set on CPU |
for
inclusion in presentation materials.
The abstraction level of the modeling
by these users depends on the analysis
and can be traffic,
transaction and functional models.
The study of operating conditions
is integral part of analysis.
Protocol
Designers
Protocols design requires the validation
of the specification in a variety
of network operating conditions.
Protocols must be executed in conjunction
with the PHY for further refinement
and to gain a true operational view.
Figure 3 Defining
Protocol Layers |
Algorithm
Developers
DSP algorithms and protocols are
currently designed using mathematical
analysis tools or coding. There
is limited correlation between this
analysis
Figure 4 View Eye
diagram for different BER
|
and
the hardware-software architecture.
VisualSim simulations can combine
these algorithms within the architecture
and analyze system effects. Models
constructed in C-code and MatLab
can be imported as functional specifications
to execute within VisualSim. Communication
systems can combine protocols and
physical layer DSP for a full system
analysis. The implementation constraints
and environmental impacts can be
visualized with further architecture
refinement.
Embedded
Software Designers
Power consumption, performance and
control of products are greatly
impacted by software implementation.
The analysis of Software tasks prior
Figure 5 Creating
instruction sets |
to
implementation will maximize code
quality and optimize for size, functionality
and performance. The creation and
use of architecture platforms provide
a virtual platform for software
design, testing and verification.
Verification
Engineers
Verification is an increasing challenge
in product development and is a
primary cause of market delays and
product cost. Validation and refinement
of the architecture prior to implementation
will reduce the dependence of projects
on costly implementation verification.
System-level modeling can provide
a golden platform for test vector
generation that flows from concept
to implementation.
Project
Managers
Project Managers have the time-consuming
effort of communicating with customers,
vendors and partners through documents
and email. VisualSim models can
be published to documents or the
Web for sharing with partners as
the specification and interface
document. These published models
are executable documents that do
not require additional software
purchase by the vendor on the other
side. The results can be shared
with customers, standard bodies
and distributed implementation teams
as the primary mode of communication
and collaboration.
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