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AMD Infinity Switch

Designing a SoC or embedded system using the open-standard NoC. Slight variation as there are some additional channels and an optional Forwarding Table at the Router.

NoC_Demo_Web

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<h2>ResourceStatistics</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Name</td><td>&quot;Multi_Block_Stats&quot;</td><td>&quot;Multi_Block_Stats&quot;</td></tr><tr><td>Scheduler_Name_Array</td><td>{} /* list of all the Schedulers as strings in a array */</td><td>{}</td></tr><tr><td>_explanation</td><td>Results-&gt;Resource_Statistical_Report</td><td>Results-&gt;Resource_Statistical_Report</td></tr><tr><td>Smart_Res_Length</td><td>{3,3,3,3} /* Number of Queues in each Smart_Resource and match the order in </td><td>{3, 3, 3, 3}</td></tr><tr><td>Number_of_Samples</td><td>6</td><td>6</td></tr><tr><td>Smart_Res_Name_Array</td><td>{&quot;R_1_1_Data&quot;,&quot;R_1_2_Data&quot;,&quot;R_2_1_Data&quot;,&quot;R_2_2_Data&quot;}</td><td>{&quot;R_1_1_Data&quot;, &quot;R_1_2_Data&quot;, &quot;R_2_1_Data&quot;, &quot;R_2_2_Data&quot;}</td></tr><tr><td>Statistics</td><td>true /* Reset is false and Statistics is true */ </td><td>true</td></tr><tr><td>SimTime</td><td>SimTime</td><td>1.0E-4</td></tr></table> <h2>RNF</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Frequency</td><td>50.0e6</td><td>5.0E7</td></tr><tr><td>Data_Bytes_low</td><td>32</td><td>32</td></tr><tr><td>Data_Bytes_high</td><td>128</td><td>128</td></tr><tr><td>Destination_Address</td><td>&quot;HNF_1&quot;</td><td>&quot;HNF_1&quot;</td></tr><tr><td>Source_Address</td><td>&quot;RNF_3&quot;</td><td>&quot;RNF_3&quot;</td></tr><tr><td>VLAN_Q</td><td>4</td><td>4</td></tr><tr><td>Device_Threshold</td><td>100</td><td>100</td></tr><tr><td>TrafficRate</td><td>20.0 * 1.0/Frequency</td><td>4.0E-7</td></tr><tr><td>Address_Low</td><td>0</td><td>0</td></tr><tr><td>Address_High</td><td>1023</td><td>1023</td></tr><tr><td>Random_Address</td><td>true</td><td>true</td></tr><tr><td>Request_Priority</td><td>&quot;All&quot;</td><td>&quot;All&quot;</td></tr><tr><td>Array_Routing</td><td>false</td><td>false</td></tr></table> <h2>R_2_2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Ingress_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>VC_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>Router_Address</td><td>&quot;R_2_2&quot;</td><td>&quot;R_2_2&quot;</td></tr><tr><td>Router_Frequency</td><td>Router_Frequency</td><td>8.0E8</td></tr><tr><td>Node_Name</td><td>&quot;R_2_2&quot;</td><td>&quot;R_2_2&quot;</td></tr><tr><td>VLAN_Q</td><td>4</td><td>4</td></tr><tr><td>Router_Coordinate</td><td>{2,2}</td><td>{2, 2}</td></tr><tr><td>Router_Queue_Length</td><td>6</td><td>6</td></tr></table> <h2>R_2_1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Ingress_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>VC_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>Router_Address</td><td>&quot;R_2_1&quot;</td><td>&quot;R_2_1&quot;</td></tr><tr><td>Router_Frequency</td><td>Router_Frequency</td><td>8.0E8</td></tr><tr><td>Node_Name</td><td>&quot;R_2_1&quot;</td><td>&quot;R_2_1&quot;</td></tr><tr><td>VLAN_Q</td><td>4</td><td>4</td></tr><tr><td>Router_Coordinate</td><td>{2,1}</td><td>{2, 1}</td></tr><tr><td>Router_Queue_Length</td><td>6</td><td>6</td></tr></table> <h2>R_1_2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Ingress_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>VC_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>Router_Address</td><td>&quot;R_1_2&quot;</td><td>&quot;R_1_2&quot;</td></tr><tr><td>Router_Frequency</td><td>Router_Frequency</td><td>8.0E8</td></tr><tr><td>Node_Name</td><td>&quot;R_1_2&quot;</td><td>&quot;R_1_2&quot;</td></tr><tr><td>VLAN_Q</td><td>4</td><td>4</td></tr><tr><td>Router_Coordinate</td><td>{1,2}</td><td>{1, 2}</td></tr><tr><td>Router_Queue_Length</td><td>6</td><td>6</td></tr></table> <h2>HNI</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Frequency</td><td>100.0e6</td><td>1.0E8</td></tr><tr><td>Source_Address</td><td>&quot;HNI_1&quot;</td><td>&quot;HNI_1&quot;</td></tr><tr><td>Device_Threshold</td><td>50</td><td>50</td></tr></table> <h2>RNI</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Data_Bytes_low</td><td>32</td><td>32</td></tr><tr><td>Destination_Address</td><td>&quot;HNI_1&quot;</td><td>&quot;HNI_1&quot;</td></tr><tr><td>Source_Address</td><td>&quot;RNI_1&quot;</td><td>&quot;RNI_1&quot;</td></tr><tr><td>TrafficRate</td><td>10.0 * 1.0/Frequency</td><td>3.3333333333333E-8</td></tr><tr><td>Data_Bytes_high</td><td>64</td><td>64</td></tr><tr><td>Frequency</td><td>300.0e6</td><td>3.0E8</td></tr><tr><td>Array_Routing</td><td>false</td><td>false</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr></table> <h2>AMBA_AXI</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Bus_Name</td><td>&quot;AXI_Top&quot;</td><td>&quot;AXI_Top&quot;</td></tr><tr><td>AXI_Speed_Mhz</td><td>1000.0</td><td>1000.0</td></tr><tr><td>AXI_Cycle_Time</td><td>1.0E-06 / AXI_Speed_Mhz</td><td>1.0E-9</td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;AHB-&gt;AXI_Bus</td><td>Interfaces and Buses-&gt;AHB-&gt;AXI_Bus</td></tr><tr><td>Bus_Width</td><td>8</td><td>8</td></tr><tr><td>Read_Threshold</td><td>2</td><td>2</td></tr><tr><td>Write_Threshold</td><td>2</td><td>2</td></tr><tr><td>Master_Request_Threshold</td><td>{2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2} </td><td>{2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}</td></tr><tr><td>Number_Masters</td><td>16</td><td>16</td></tr><tr><td>Number_Slaves</td><td>8</td><td>8</td></tr><tr><td>Threshold_Trans_T_Bytes_F</td><td>false</td><td>false</td></tr><tr><td>Arbiter_FIX_1_RR_2_CUSTOM_3</td><td>1</td><td>1</td></tr><tr><td>Slave_Speeds_Mhz</td><td>{AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz,AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz, AXI_Speed_Mhz}</td><td>{1000.0, 1000.0, 1000.0, 1000.0, 1000.0, 1000.0, 1000.0, 1000.0}</td></tr><tr><td>Extra_Cycles_for_RdReq_WrReq_RdData_WrData</td><td>{0, 0, 0, 0, 0, 0, 0, 0}</td><td>{0, 0, 0, 0, 0, 0, 0, 0}</td></tr><tr><td>Devices_Attached_to_Slave_by_Port</td><td>{{&quot;SDRAM&quot;},{&quot;Device_2&quot;},{&quot;Device_3&quot;},{&quot;Device_4&quot;},{&quot;Device_5&quot;},{&quot;Device_6&quot;},{&quot;Device_7&quot;},{&quot;Device_8&quot;}}</td><td>{{&quot;SDRAM&quot;}, {&quot;Device_2&quot;}, {&quot;Device_3&quot;}, {&quot;Device_4&quot;}, {&quot;Device_5&quot;}, {&quot;Device_6&quot;}, {&quot;Device_7&quot;}, {&quot;Device_8&quot;}}</td></tr><tr><td>Master_First_Word_Flag</td><td>true</td><td>true</td></tr><tr><td>Master_Throttle_Enable</td><td>{false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false}</td><td>{false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false}</td></tr><tr><td>Slave_Throttle_Enable</td><td>{false,false,false,false,false,false,false,false} </td><td>{false, false, false, false, false, false, false, false}</td></tr><tr><td>DEBUG</td><td>false</td><td>false</td></tr><tr><td>Custom_Arbiter_File</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Custom_Arbiter_Path</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Fixed_Priority_Array</td><td>{{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16},{1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16}}</td><td>{{1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}, {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}}</td></tr><tr><td>Slave_First_Word_Flag</td><td>true /* Not Active in Default Slave */</td><td>true</td></tr><tr><td>Custom_Slave_File</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Ports_to_Plot</td><td>{0,0} /* master n, slave m, 0 disables */</td><td>{0, 0}</td></tr></table> <h2>Buffer Stats</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Stats</td><td>true</td><td>true</td></tr></table> <h2>Delay7</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_2_1&quot;</td><td>&quot;R_2_1&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_2_2&quot;</td><td>&quot;R_2_2&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_2_1_to_R_2_2&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>0</td><td>0</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Delay6</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_2_2&quot;</td><td>&quot;R_2_2&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_2_1&quot;</td><td>&quot;R_2_1&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_2_2_to_R_2_1&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Delay5</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_1_2&quot;</td><td>&quot;R_1_2&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_2_2&quot;</td><td>&quot;R_2_2&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_1_2_to_R_2_2&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>90</td><td>90</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Delay4</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_2_2&quot;</td><td>&quot;R_2_2&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_1_2&quot;</td><td>&quot;R_1_2&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_2_2_to_R_1_2&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>270</td><td>270</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Delay3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_1_1&quot;</td><td>&quot;R_1_1&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_2_1&quot;</td><td>&quot;R_2_1&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_1_1_to_R_2_1&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>90</td><td>90</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Delay2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_1_1&quot;</td><td>&quot;R_1_1&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_1_2&quot;</td><td>&quot;R_1_2&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_1_1_to_R_1_2&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>false</td><td>false</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>0</td><td>0</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Delay9</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_2_1&quot;</td><td>&quot;R_2_1&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_1_1&quot;</td><td>&quot;R_1_1&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_2_1_to_R_1_1&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>270</td><td>270</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>End_To_End Latency</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>fillOnWrapup</td><td>true</td><td>true</td></tr><tr><td>legend</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>startingDataset</td><td>0</td><td>0</td></tr><tr><td>fileName</td><td>Enter Filename to save plot</td><td>&quot;Enter Filename to save plot&quot;</td></tr><tr><td>viewPlot</td><td>true</td><td>true</td></tr><tr><td>savePlot</td><td>false</td><td>false</td></tr></table> <h2>Memory Stats</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>ViewText</td><td>true</td><td>true</td></tr><tr><td>saveText</td><td>true</td><td>true</td></tr><tr><td>fileName</td><td>Memory_Stats.txt</td><td>&quot;Memory_Stats.txt&quot;</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr></table> <h2>Router Stats</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>ViewText</td><td>true</td><td>true</td></tr><tr><td>saveText</td><td>true</td><td>true</td></tr><tr><td>fileName</td><td>Router_Stats.txt</td><td>&quot;Router_Stats.txt&quot;</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr></table> <h2>Delay</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Start_Device</td><td>&quot;R_1_2&quot;</td><td>&quot;R_1_2&quot;</td></tr><tr><td>End_Device</td><td>&quot;R_1_1&quot;</td><td>&quot;R_1_1&quot;</td></tr><tr><td>Delay_Name</td><td>Start_Device + &quot;_to_&quot; + End_Device</td><td>&quot;R_1_2_to_R_1_1&quot;</td></tr><tr><td>Wire_Length</td><td>1e-8</td><td>1.0E-8</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr><tr><td>Clock_Speed</td><td>200e6</td><td>2.0E8</td></tr><tr><td>Delay_Cycles</td><td>1</td><td>1</td></tr></table> <h2>Database4</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>*.xml, *.csv files abs or rel (./) path\\n -- *.csv real columns set to number\\nInput_Fields == Lookup_Fields (num, type)\\nOutput_Expr: match, match_last, match_all\\n -- match_all.field not allowed</td><td>*.xml, *.csv files abs or rel (./) path\\n -- *.csv real columns set to number\\nInput_Fields == Lookup_Fields (num, type)\\nOutput_Expr: match, match_last, match_all\\n -- match_all.field not allowed</td></tr><tr><td>Linking_Name</td><td>&quot;Forwarding_Table&quot;</td><td>&quot;Forwarding_Table&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Data_Structure_Text</td><td>A_Source A_Destination A_Path;\\n&quot;HNF_1&quot; &quot;RNF_1&quot; {&quot;R_2_2&quot;,&quot;R_2_1&quot;,&quot;R_1_1&quot;};\\n&quot;HNF_1&quot; &quot;RNF_3&quot; {&quot;R_2_2&quot;,&quot;R_1_2&quot;}; \\n&quot;HNF_1&quot; &quot;RNF_5&quot; {&quot;R_2_2&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_1&quot;\t &quot;HNI_1&quot; {&quot;R_1_1&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_1&quot;\t &quot;HNF_1&quot; {&quot;R_1_1&quot;,&quot;R_2_1&quot;,&quot;R_2_2&quot;};\\n&quot;RNI_1&quot;\t &quot;HNI_1&quot; {&quot;R_1_1&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_3&quot;\t &quot;HNF_1&quot; {&quot;R_1_2&quot;,&quot;R_2_2&quot;};\\n&quot;RNF_3&quot;\t &quot;HNI_1&quot; {&quot;R_1_2&quot;,&quot;R_1_1&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_5&quot;\t &quot;HNF_1&quot; {&quot;R_2_1&quot;,&quot;R_2_2&quot;};\\n</td><td>A_Source A_Destination A_Path;\\n&quot;HNF_1&quot; &quot;RNF_1&quot; {&quot;R_2_2&quot;,&quot;R_2_1&quot;,&quot;R_1_1&quot;};\\n&quot;HNF_1&quot; &quot;RNF_3&quot; {&quot;R_2_2&quot;,&quot;R_1_2&quot;}; \\n&quot;HNF_1&quot; &quot;RNF_5&quot; {&quot;R_2_2&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_1&quot;\t &quot;HNI_1&quot; {&quot;R_1_1&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_1&quot;\t &quot;HNF_1&quot; {&quot;R_1_1&quot;,&quot;R_2_1&quot;,&quot;R_2_2&quot;};\\n&quot;RNI_1&quot;\t &quot;HNI_1&quot; {&quot;R_1_1&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_3&quot;\t &quot;HNF_1&quot; {&quot;R_1_2&quot;,&quot;R_2_2&quot;};\\n&quot;RNF_3&quot;\t &quot;HNI_1&quot; {&quot;R_1_2&quot;,&quot;R_1_1&quot;,&quot;R_2_1&quot;};\\n&quot;RNF_5&quot;\t &quot;HNF_1&quot; {&quot;R_2_1&quot;,&quot;R_2_2&quot;};\\n</td></tr><tr><td>Input_Fields</td><td>&quot;A_Source,A_Destination&quot;</td><td>&quot;A_Source,A_Destination&quot;</td></tr><tr><td>Lookup_Fields</td><td>&quot;A_Source,A_Destination&quot;</td><td>&quot;A_Source,A_Destination&quot;</td></tr><tr><td>Output_Expression</td><td>&quot;output = match&quot; /* FORMAT output = match.fieldb */</td><td>&quot;output = match&quot;</td></tr><tr><td>Mode</td><td>Read</td><td>Read</td></tr></table> <h2>HNF_1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Next_Device</td><td>&quot;SDRAM&quot;</td><td>&quot;SDRAM&quot;</td></tr><tr><td>Frequency</td><td>100.0e6</td><td>1.0E8</td></tr><tr><td>Flit_Size</td><td>64</td><td>64</td></tr><tr><td>Num_Queues</td><td>16</td><td>16</td></tr><tr><td>Source_Address</td><td>&quot;HNF_1&quot;</td><td>&quot;HNF_1&quot;</td></tr><tr><td>Device_Threshold</td><td>50</td><td>50</td></tr></table> <h2>R_1_1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Ingress_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>VC_Buffer_Size</td><td>10</td><td>10</td></tr><tr><td>Router_Address</td><td>&quot;R_1_1&quot;</td><td>&quot;R_1_1&quot;</td></tr><tr><td>Router_Frequency</td><td>Router_Frequency</td><td>8.0E8</td></tr><tr><td>Node_Name</td><td>&quot;R_1_1&quot;</td><td>&quot;R_1_1&quot;</td></tr><tr><td>VLAN_Q</td><td>4</td><td>4</td></tr><tr><td>Router_Coordinate</td><td>{1,1}</td><td>{1, 1}</td></tr><tr><td>Router_Queue_Length</td><td>6</td><td>6</td></tr></table> <h2>RNF_1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Frequency</td><td>300.0e6</td><td>3.0E8</td></tr><tr><td>Data_Bytes_low</td><td>32</td><td>32</td></tr><tr><td>Data_Bytes_high</td><td>128</td><td>128</td></tr><tr><td>Destination_Address</td><td>&quot;HNF_1&quot;</td><td>&quot;HNF_1&quot;</td></tr><tr><td>Source_Address</td><td>&quot;RNF_1&quot;</td><td>&quot;RNF_1&quot;</td></tr><tr><td>VLAN_Q</td><td>4</td><td>4</td></tr><tr><td>Device_Threshold</td><td>100</td><td>100</td></tr><tr><td>TrafficRate</td><td>10.0 * 1.0/Frequency</td><td>3.3333333333333E-8</td></tr><tr><td>Address_Low</td><td>0</td><td>0</td></tr><tr><td>Address_High</td><td>1023</td><td>1023</td></tr><tr><td>Random_Address</td><td>true</td><td>true</td></tr><tr><td>Request_Priority</td><td>&quot;All&quot;</td><td>&quot;All&quot;</td></tr><tr><td>Array_Routing</td><td>false</td><td>false</td></tr></table> <h2>ArchitectureSetup</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Source_Node Destination_Node Hop Source_Port ; \\nProcessor_1 Cache_1 Port_1 bus_out2 ;\\nCache_1 Processor_1 Port_2 output ;\\nCache_1 SDRAM_1 Port_2 output ;\\nSDRAM_1 Cache_1 Port_4 output ;\\nSDRAM_1 Processor_1 Port_4 output ;</td><td>Source_Node Destination_Node Hop Source_Port ; \\nProcessor_1 Cache_1 Port_1 bus_out2 ;\\nCache_1 Processor_1 Port_2 output ;\\nCache_1 SDRAM_1 Port_2 output ;\\nSDRAM_1 Cache_1 Port_4 output ;\\nSDRAM_1 Processor_1 Port_4 output ;</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Field_Name_Mapping</td><td>/* First row contains Column Names. */\\nExternal_Field_Name Internal_Field_Name ; \\nA_Address A_Address ; \\nA_Bytes A_Bytes ; \\nA_Data A_Data ; \\nA_IDX A_IDX ; \\nA_Instruction A_Instruction ; \\nA_Priority A_Priority ; \\nA_Source A_Source ; \\nA_Destination A_Destination ; \\nA_Task_ID A_Task_ID ; \\nA_Time A_Time ; \\n</td><td>/* First row contains Column Names. */\\nExternal_Field_Name Internal_Field_Name ; \\nA_Address A_Address ; \\nA_Bytes A_Bytes ; \\nA_Data A_Data ; \\nA_IDX A_IDX ; \\nA_Instruction A_Instruction ; \\nA_Priority A_Priority ; \\nA_Source A_Source ; \\nA_Destination A_Destination ; \\nA_Task_ID A_Task_ID ; \\nA_Time A_Time ; \\n</td></tr><tr><td>Routing_Table</td><td>/* First row contains Column Names. */</td><td>/* First row contains Column Names. */</td></tr><tr><td>Number_of_Samples</td><td>2</td><td>2</td></tr><tr><td>Statistics_to_Plot</td><td>&quot;SDRAM_Utilization_Min, SDRAM_Utilization_Mean, SDRAM_Utilization_Max&quot;</td><td>&quot;SDRAM_Utilization_Min, SDRAM_Utilization_Mean, SDRAM_Utilization_Max&quot;</td></tr><tr><td>Internal_Plot_Trace_Offset</td><td>2</td><td>2</td></tr><tr><td>Listen_to_Architecture_Options</td><td>DRAM</td><td>DRAM</td></tr></table> <h2>Memory_Controller</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Controller_Name</td><td>&quot;LPDDR&quot;</td><td>&quot;LPDDR&quot;</td></tr><tr><td>DRAM_Type</td><td>&quot;LPDDR2_S2&quot; /* SDR, DDR, DDR2, LPDDR, LPDDR2_NV, LPDDR2_S2, LPDDR2_S4, LPDDR3, DDR3 */</td><td>&quot;LPDDR2_S2&quot;</td></tr><tr><td>Controller_Speed_Mhz</td><td>500.0</td><td>500.0</td></tr><tr><td>Memory_Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Bus_Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Command_Buffer_Length</td><td>8</td><td>8</td></tr><tr><td>Commands_in_a_Row</td><td>8</td><td>8</td></tr><tr><td>Mfg_Suggest_Timing</td><td>{3,7,8,17} /* tCL, tRCD, tRP, tRAS */</td><td>{3, 7, 8, 17}</td></tr><tr><td>Extra_Timing</td><td>{1,3,4,1,3,1,1,1,0} /* DQSS, tWTR, tRRD,tWR, tRL, tWL, tDQSCK, tRTP, tHWpre */</td><td>{1, 3, 4, 1, 3, 1, 1, 1, 0}</td></tr><tr><td>Burst_Length</td><td>4 /* 2, 4, 8 */</td><td>4</td></tr><tr><td>Memory_Column</td><td>{2,9}</td><td>{2, 9}</td></tr><tr><td>Memory_Row</td><td>{10,24}</td><td>{10, 24}</td></tr><tr><td>Memory_Bank</td><td>{0,1}</td><td>{0, 1}</td></tr><tr><td>Memory_Bank_Length</td><td>round(pow(2,(Memory_Bank(1) - Memory_Bank(0) + 1)))</td><td>4L</td></tr><tr><td>DRAM_Return_Cycles</td><td>0</td><td>0</td></tr><tr><td>First_Word_Flag</td><td>true</td><td>true</td></tr><tr><td>Sim_Time</td><td>SimTime</td><td>1.0E-4</td></tr><tr><td>Custom_Arbiter_File</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Custom_Arbiter_Path</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>DEBUG</td><td>false</td><td>false</td></tr><tr><td>_explanation</td><td>Hardware_Modeling-&gt;Memory-&gt;Memory_Controller</td><td>Hardware_Modeling-&gt;Memory-&gt;Memory_Controller</td></tr><tr><td>HW_DRAM_Name</td><td>&quot;SDRAM&quot;</td><td>&quot;SDRAM&quot;</td></tr><tr><td>Power_Manager_Name</td><td>&quot;none&quot; /* Default */</td><td>&quot;none&quot;</td></tr></table> <h2>HW_DRAM</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>HW_DRAM_Name</td><td>&quot;SDRAM&quot;</td><td>&quot;SDRAM&quot;</td></tr><tr><td>HW_DRAM_Speed_Mhz</td><td>500.0</td><td>500.0</td></tr><tr><td>Number_of_Banks</td><td>8</td><td>8</td></tr><tr><td>Sim_Time</td><td>SimTime</td><td>1.0E-4</td></tr><tr><td>_explanation</td><td>Hardware_Modeling-&gt;Memory-&gt;HW_DRAM</td><td>Hardware_Modeling-&gt;Memory-&gt;HW_DRAM</td></tr><tr><td>Memory_Width_Bytes</td><td>4</td><td>4</td></tr><tr><td>Burst_Length</td><td>4 /* 2, 4, 8 */</td><td>4</td></tr><tr><td>DRAM_Type</td><td>&quot;LPDDR2_S2&quot; /* SDR, DDR, DDR2, LPDDR, LPDDR2_NV, LPDDR2_S2, LPDDR2_S4, LPDDR3, DDR3 */</td><td>&quot;LPDDR2_S2&quot;</td></tr><tr><td>Mfg_Suggest_Timing</td><td>{2,2,2,6} /* tCAS, tRCD, tRP, tRAS */</td><td>{2, 2, 2, 6}</td></tr><tr><td>Extra_Timing</td><td>{2,2,1,1,3,1,2,1,0,16} /* DQSS, tWTR, tRRD, tWR, tRL, tWL , tDQSCK, tRTP, tHWpre, tFAW */</td><td>{2, 2, 1, 1, 3, 1, 2, 1, 0, 16}</td></tr><tr><td>Fix_DQSS</td><td>true</td><td>true</td></tr><tr><td>Refresh_Rate_per_Bank_ms</td><td>64.0 /* 64.0 ms */</td><td>64.0</td></tr><tr><td>Refresh_Cycles_per_Bank</td><td>256 /* 256 cycles per bank */</td><td>256</td></tr><tr><td>Enable_External_Data</td><td>false</td><td>false</td></tr><tr><td>Address_Bit_Map</td><td>{{2,9},{10,24},{0,1}} /* col, row, bank (min, max) Bit Position */</td><td>{{2, 9}, {10, 24}, {0, 1}}</td></tr><tr><td>Standard_Name</td><td>&quot;none&quot; /*reads DDR_Memory_Standards.txt */</td><td>&quot;none&quot;</td></tr><tr><td>Standard_File</td><td>VS/VisualSim/actor/arch/Memory/DDR_Memory_Standards.txt</td><td>&quot;VS/VisualSim/actor/arch/Memory/DDR_Memory_Standards.txt&quot;</td></tr><tr><td>Power_Manager_Name</td><td>&quot;none&quot; /* Default */</td><td>&quot;none&quot;</td></tr><tr><td>Memory_Controller</td><td>&quot;none&quot; /* Default */</td><td>&quot;none&quot;</td></tr><tr><td>Bank_at_a_Time</td><td>true /* false=all */</td><td>true</td></tr><tr><td>DEBUG</td><td>false</td><td>false</td></tr><tr><td>State_Plot_Enable</td><td>false</td><td>false</td></tr></table> <h2>CycleAccurateCache</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Cache_Name</td><td>&quot;Cache_L3&quot;</td><td>&quot;Cache_L3&quot;</td></tr><tr><td>Cache_Size_KB</td><td>16</td><td>16</td></tr><tr><td>Cache_Speed_Mhz</td><td>1000.0</td><td>1000.0</td></tr><tr><td>Cache_Bytes_per_Word</td><td>8</td><td>8</td></tr><tr><td>Bus_Width_Bytes</td><td>16</td><td>16</td></tr><tr><td>Cache_Line_Words</td><td>8</td><td>8</td></tr><tr><td>Cache_N_Associativity</td><td>4 /* 0 (Full Associaitive,1(Direct),2,4,8,16,32 */</td><td>4</td></tr><tr><td>Cache_Replacement_Policy</td><td>&quot;Least_Recently_Used&quot; /* Least_Recently_Used, Most_Recently_Used */</td><td>&quot;Least_Recently_Used&quot;</td></tr><tr><td>Cache_Write_Policy</td><td>&quot;Write_Back&quot; /* Write_Back, Write_Through */</td><td>&quot;Write_Back&quot;</td></tr><tr><td>Cache_Prefetch_Lines</td><td>1 /* 0,1,2,3... */</td><td>1</td></tr><tr><td>Overhead_Cycles</td><td>1</td><td>1</td></tr><tr><td>Next_Higher_Memory_Name</td><td>&quot;SDRAM&quot;</td><td>&quot;SDRAM&quot;</td></tr><tr><td>DRAM_Name</td><td>&quot;SDRAM&quot;</td><td>&quot;SDRAM&quot;</td></tr><tr><td>First_Word_Flag</td><td>false</td><td>false</td></tr><tr><td>Snooping_Flag</td><td>false</td><td>false</td></tr><tr><td>Read_File</td><td>&quot;none&quot;</td><td>&quot;none&quot;</td></tr><tr><td>Sim_Time</td><td>1.0</td><td>1.0</td></tr><tr><td>_explanation</td><td>ProcessorGenerator-&gt;CycleAccurateCache</td><td>ProcessorGenerator-&gt;CycleAccurateCache</td></tr><tr><td>Number_Statistics_Samples</td><td>1</td><td>1</td></tr><tr><td>DEBUG</td><td>false</td><td>false</td></tr><tr><td>Next_Memory_Bus</td><td>true</td><td>true</td></tr></table> <h2>Database2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Mac_ID :: Mac_ID Address Mbps :: Data rate\\nSize_Bytes :: 1500 Start_Time :: 0.0 \\nStop_Time :: 1.0E-03 Protocol :: TCP_IP or UDP</td><td>Mac_ID :: Mac_ID Address Mbps :: Data rate\\nSize_Bytes :: 1500 Start_Time :: 0.0 \\nStop_Time :: 1.0E-03 Protocol :: TCP_IP or UDP</td></tr><tr><td>Linking_Name</td><td>&quot;VLAN&quot;</td><td>&quot;VLAN&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Data_Structure_Text</td><td>VLAN_ID Bandwidth \t; \\n 1 200.0e6 \t; \\n 2 200.0e6 \t; \\n 3 200.0e6 \t; \\n 4 200.0e6 \t; \\n</td><td>VLAN_ID Bandwidth \t; \\n 1 200.0e6 \t; \\n 2 200.0e6 \t; \\n 3 200.0e6 \t; \\n 4 200.0e6 \t; \\n</td></tr><tr><td>Input_Fields</td><td>&quot;VLAN_ID&quot;</td><td>&quot;VLAN_ID&quot;</td></tr><tr><td>Lookup_Fields</td><td>&quot;VLAN_ID&quot;</td><td>&quot;VLAN_ID&quot;</td></tr><tr><td>Output_Expression</td><td>&quot;output = match_all&quot; /* FORMAT output = match.fieldb */</td><td>&quot;output = match_all&quot;</td></tr><tr><td>Mode</td><td>Read</td><td>Read</td></tr></table> <h2>Database</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Router_C_Address -&gt; Current Router Address\\nRouter_D_Address -&gt; Destination Router Address\\n</td><td>Router_C_Address -&gt; Current Router Address\\nRouter_D_Address -&gt; Destination Router Address\\n</td></tr><tr><td>Linking_Name</td><td>&quot;AddressDecoder&quot;</td><td>&quot;AddressDecoder&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Data_Structure_Text</td><td>Router_C_Address A_Destination Router_Hop_Address;\\n&quot;R_1_1&quot; &quot;RNF_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_1_1&quot; &quot;RNI_1&quot; &quot;0x00006&quot;; /*Device2*/\\n&quot;R_1_1&quot; &quot;R_1_2&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_1_1&quot; &quot;R_2_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_1&quot; &quot;HNF_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_1&quot; &quot;HNI_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_2&quot; &quot;RNF_3&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_1_2&quot; &quot;RNF_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_1_2&quot; &quot;RNF_4&quot; &quot;0x00006&quot;; /*Device2*/\\n&quot;R_1_2&quot; &quot;R_1_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_1_2&quot; &quot;R_2_2&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_2&quot; &quot;HNI_1&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_1_2&quot; &quot;HNF_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_2_1&quot;\t &quot;HNI_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_2_1&quot;\t &quot;RNF_6&quot; &quot;0x00006&quot;; /*Device2*/\\n&quot;R_2_1&quot;\t &quot;R_1_1&quot; &quot;0x00002&quot;; /*North*/\\n&quot;R_2_1&quot;\t &quot;R_2_2&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_2_1&quot;\t &quot;HNF_1&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_2_1&quot;\t &quot;HNI_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_2_1&quot;\t &quot;RNF_1&quot; &quot;0x00002&quot;; /*North*/\\n&quot;R_2_2&quot;\t &quot;HNF_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_2_2&quot;\t &quot;R_1_2&quot; &quot;0x00002&quot;; /*North*/\\n&quot;R_2_2&quot;\t &quot;R_2_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_2_2&quot;\t &quot;RNF_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_2_2&quot;\t &quot;RNF_3&quot; &quot;0x00002&quot;; /*North*/</td><td>Router_C_Address A_Destination Router_Hop_Address;\\n&quot;R_1_1&quot; &quot;RNF_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_1_1&quot; &quot;RNI_1&quot; &quot;0x00006&quot;; /*Device2*/\\n&quot;R_1_1&quot; &quot;R_1_2&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_1_1&quot; &quot;R_2_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_1&quot; &quot;HNF_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_1&quot; &quot;HNI_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_2&quot; &quot;RNF_3&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_1_2&quot; &quot;RNF_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_1_2&quot; &quot;RNF_4&quot; &quot;0x00006&quot;; /*Device2*/\\n&quot;R_1_2&quot; &quot;R_1_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_1_2&quot; &quot;R_2_2&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_1_2&quot; &quot;HNI_1&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_1_2&quot; &quot;HNF_1&quot; &quot;0x00004&quot;; /*South*/\\n&quot;R_2_1&quot;\t &quot;HNI_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_2_1&quot;\t &quot;RNF_6&quot; &quot;0x00006&quot;; /*Device2*/\\n&quot;R_2_1&quot;\t &quot;R_1_1&quot; &quot;0x00002&quot;; /*North*/\\n&quot;R_2_1&quot;\t &quot;R_2_2&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_2_1&quot;\t &quot;HNF_1&quot; &quot;0x00003&quot;; /*East*/\\n&quot;R_2_1&quot;\t &quot;HNI_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_2_1&quot;\t &quot;RNF_1&quot; &quot;0x00002&quot;; /*North*/\\n&quot;R_2_2&quot;\t &quot;HNF_1&quot; &quot;0x00001&quot;; /*Device*/\\n&quot;R_2_2&quot;\t &quot;R_1_2&quot; &quot;0x00002&quot;; /*North*/\\n&quot;R_2_2&quot;\t &quot;R_2_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_2_2&quot;\t &quot;RNF_1&quot; &quot;0x00005&quot;; /*West*/\\n&quot;R_2_2&quot;\t &quot;RNF_3&quot; &quot;0x00002&quot;; /*North*/</td></tr><tr><td>Input_Fields</td><td>&quot;Router_C_Address,A_Destination&quot;</td><td>&quot;Router_C_Address,A_Destination&quot;</td></tr><tr><td>Lookup_Fields</td><td>&quot;Router_C_Address,A_Destination&quot;</td><td>&quot;Router_C_Address,A_Destination&quot;</td></tr><tr><td>Output_Expression</td><td>&quot;output = match&quot; /* FORMAT output = match.fieldb */</td><td>&quot;output = match&quot;</td></tr><tr><td>Mode</td><td>Read</td><td>Read</td></tr></table>

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