Demonstrates the use of the UART and USART blocks in VisualSim
Model shows the use of the Switch in managing connections between a large number of Masters and Slaves
DMA is connected to Slave devices and I/O across the PCIe bus
Shows a network containing a AHB connected to an AXI bus via bridge
Bridge connects the Processor on an AHB bus to the DRAM on a PCIe Bus
Define a serial channel, parallel channel, FPGA-to-FPGA link, Aurora communication channel, and wireless channel with BER.
