Library
- Task Graph library block with integration
- Power Table Expressions to compute the Active and Standby power using basic information- Process, temperature, Voltage, frequency and area for both leakage and dynamic
- Added all the devices associated with AMBA Corelink, S3,600, 700
- RF library
- Mechanical library including cables
- Coherent cache and demo model in a large multi-domain environment
- Andes A66X
- Arteris- Completely revamped FlexNoC library of NIU, Mux, Demux, Switch and Setup
- SPI daisy and parallel model
- Airborne communication system
- Support for NVlink, NVSwitch
- Fully tested and validated CXL with SmartDV IP Library
- New methodology to handle one trillion plus instruction software code execution on architecture model
- Generate accurate fetch and load/store addresses
- Upgraded SystemC support for version 3.0.1 and the user of separate memory for each instance
- New Python modeling block with fulll Python support using Py4J, input/output ports, event calendar access, parameters.
- Update MatLab and Simulink interfaces for ver 2025
- New demo models for all these new libraries
- Updated VCD read and Writer to support all Verilog/SystemVerilog data types
- Updated Matlab interface to support Simulink models
Features
- New Text Editor that recognizes different languages, methods and RegEx
- Updates to the GUI for error models to opened in VisualSim
- Updated format for the Block Documentation
- Updated the Script documentation to explain the features better
- New clean format with explanation for all the RegEx functions
- Completely new Website
- New software patch tracking method
- New software download process