Mirabilis Design introduces the next evolution of VisualSim Architect 2630: an AI-assisted digital engineering environment for semiconductor, SoC, chiplet, data center, and cyber-physical system design. VisualSim helps engineering teams move faster from concept to verified architecture. A modern AI SoC, chiplet platform, avionics system, communication system, automotive controller, or data center accelerator is not a collection of isolated blocks. It is a complete operating environment.
1. AI-Assisted Modeling and Analysis
VisualSim now integrates Agentic AI into the architecture workflow. Unlike a generic chatbot, VisualSim AI is connected to the model, libraries, scripts, statistics, and requirements. It helps engineers:
- Build models from text or GraphML inputs
- Generate Python, scripts, and automation code
- Identify performance, power, and thermal bottlenecks
- Recommend topology or parameter changes
- Predict trends from simulation data
- Select the right hardware configuration to execute a workload
2. Power and Thermal Digital Engineering
VisualSim has expanded its power and thermal flow with UPF 4.0-based power modeling. The upgraded capability supports:
- Power domains, states, and power management can be imported and exported to UPF 4.0
- VCD generation for activity analysis
- SystemVerilog verification code for power-state transitions
- SoC temperature measurement for leakage-power analysis
- Expanded thermal analysis with dynamic power activity and device definition
3. Requirements, Statistics, and Optimization
VisualSim now connects requirements, traces, statistics, and optimization into a continuous validation flow. New capabilities include:
- ReqIF-compatible requirements integration
- Statistics comparison across multiple runs
- Analysis across different parameter combinations
- Bottleneck detection across compute, memory, interconnect, software, power, and thermal behavior
- Python-based automation for analysis and visualization
- Requirements linked directly to simulation results
4. Expanded Semiconductor and System Libraries
VisualSim continues to expand its library ecosystem for next-generation semiconductor and system design. New and upgraded libraries include:
- Andes processors
- UALink and NVLink
- UCIe upgrades and PCIe 6.0
- Kubernetes and RTOS models
- Data center models
- Power modeling in the Arteris library
- Cadence Janus NoC, Tensilica HiFi DSP, LX8, and NPU models
- SmartDV CXL models
These add to VisualSim’s existing libraries for CPUs, GPUs, NPUs, DSPs, FPGAs, XPUs, NoCs, buses, caches, memory controllers, interfaces, workloads, RF, DSP, analog, antenna, channel, electrical, mechanical, and software-platform modeling.
VisualSim Architect provides a clear direction for the future of semiconductor and system design: AI-assisted, requirements-driven, architecture-level digital engineering. By combining advanced libraries, UPF-based power and thermal analysis, multi-run statistics, optimization, and Agentic AI, VisualSim helps teams move faster from concept to verified architecture. VisualSim reduces design risk, accelerate trade-off analysis, and transform the way complex electronics systems are built.
