Mirabilis Design has recently introduced the Hybrid Processor model, an enhancement to the company’s IP library. This post discusses the application of this IP library – the VisualSim AI Processor Designer.
For new AI technology, focus is on:
- Accelerating time taken to deliver product to market
- Eliminating both under-design and over-design
- Providing a configuration platform for end-users to explore
VisualSim can be used for the following:
- Design of AI processor cores
- Partition algorithms on a System-on-Chip between traditional, DSP and AI processors
- Test the performance of an AI processor in various applications
VisualSim AI contains configurable, source-code provided Intellectual Property for:
- Processor cores
- Custom AI designer
- Task partitioning utilities
- Cache
- Memory
- Storage
- Peripherals
- Interfaces
- Neural nodes
- Interconnect
In an AI SoC architecture analysis, the associated Insight Engine quickly detects the source of bottlenecks, performance limitations and higher power consumption.
Platform Features
The platform also integrates into the FPGA emulators and early software development. Users can run software on the target architecture to view the expected response times, network throughput, cache hit-ratio, and memory bandwidth.
Features include:
- Enabling an architect to rapidly construct a model by configuring the IP and assembling the topology in a graphical modeling
- Allowing the user to run AI workloads with simulated traffic on the interfaces
- Simulating the model to allocate tasks between cores and accelerators
- Size the system parameters
- Trade-off response time and power consumption
- Select the scheduler for the neural network
- Manage the queues and flow control
Have a question? Or would like to know more? Do let us know!