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Modeling of Software Process using VisualSim Architect

October 10, 2015

Over the past few decades the software industry has been assailed by numerous accounts of schedule and cost overruns as well as poor product quality delivered by software development organizations in both the commercial and government sectors. One of the areas of research which addressed the problem effectively is Software process modeling and simulation. The […]

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Linking System-level modeling to RTL and Source code

October 10, 2015

Everyone is always looking for this elusive link from high-level conceptual design to implementation. Also, what is high-level and what is implementation also depends on the team charter. Is it a functional model or timing or a power model? Is the implementation in RTL (Verilog or VHDL) or C, C++ or Java for software? Or […]

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Integrated Vehicle Health Management(IVHM) system development using VisualSim Architect

October 10, 2015

One of our recent work was evaluation of the “Integrated Vehicle Health Monitoring(IVHM)” of electronic systems using VisualSim for modeling and simulation. In the current scenario most of the solutions are using analytical methods to evaluate “success” or “failure” of a system which is obviously a critical task. We have created a very detailed level models […]

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ESL and IC-only Solutions are not the same

October 10, 2015

Most articles on ESL cover the IC-only design or a virtual prototyping environment for software development. Articles would be accurate if systems were simple and ICs were the only parts in a complete product. Unfortunately for an already confused industry, everyone mixes ESL and IC, seeming to imply that ESL tools aren’t needed. Remember that […]

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System-level Models- How well do they correlate with the implementation?

October 10, 2015

System engineers and hardware/software architects are always worried about the correlation between a system-level model and RTL. Also, can a system-level model achieve the fidelity and accuracy of the actual implementation. We at Mirabilis Design, have evolved a methodology that allows the user to create a design flow that incorporates all the checks and balances […]

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SSD and Power Reduction

October 10, 2015

Today’s processing is very data dependent.  This means that the processing core is no longer the bottleneck.  With the addition of multi-core there is significant trade-off and reduction available cache.  In the past, hit-ratios were used to measure the performance of the system and MIPS was the final throughput number.  Video processing and multi-media applications […]

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