Performance analysis and early architecture exploration ensures that you will select the right hardware/software platform and achieve optimal partitioning of the application onto available resources. In product design, three factors are certain: specifications change, non-deterministic traffic and faster processing resources. Products operate where processing and resource consumption are a function of the data and user operations. Processor-based systems used for production must meet quality, reliability, and performance metrics to address customer requirements. What is the optimal distribution of tasks and functions into hardware acceleration and software on devices? How can you determine the best hardware platform to meet the requirements and attain the highest performance at the lowest cost?
Graphical modeling and simulation tools like VisualSim provides pre-built components that are graphically instantiated to describe hardware and software architectures. The applications and use cases are described as flow charts and simulated using multiple traffic profiles. This approach reduces the model construction burden and allows you to focus on analysis and interpretation of results. It also helps you optimize product architectures by running simulations with application profiles to explore platform selection; hardware versus software decisions; peripheral devices versus performance; and partitioning of behavior on target architectures.
Simulation models can also be used to optimize every aspect of a system specification, including task distribution on processors; selection and sizing of the processors; select functions requiring a co-processor; optimal interface speed; pins required; cache and memory organization, allocation schemes and speeds; off-chip buffering; and impact redundant operators. An analysis conducted can include data size versus latency, protocol overhead versus effective bandwidth, and resource utilization.
For a switch, multimedia or wireless device implementation, decisions to consider include; on-chip embedded PowerPC/ARM or external processor for routing operations; encryption algorithms using the DSP IP blocks or DSP processors; a dedicated customizable processor for traffic management; PowerPC for control or proxy rules processing; and TCP offload using external co-processor or MicroBlaze on FPGA. Can a set of parallel small footprint embedded processors with external SDRAM support in-line spyware detection? What will the performance be when the data size changes from 256 bytes to 1,512 bytes? How can you plan for future applications such as mobile IP?
You can extend the exploration to consider the interfaces between the SoC/ FPGA and board peripherals such as SDRAM.
Performance modeling and trade-off analysis early in the design flow ensures a highly optimized product for quality, reliability, performance, and cost. This provides direction for implementation plans, reduces the amount of tests you need to conduct, and has the ability to shrink the development cycle by almost 30% and above.