High Performance Computer

Creating an OpenVPX backplane for an outer space application

HPCSystemWithIDTSwitch

Browsable image of the model.

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HPCSystemWithIDTSwitchmodel <h2>PowerTable2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>This is the Excel spreadsheet import.  The power \\ninformation is maintained here.</td><td>This is the Excel spreadsheet import.  The power \\ninformation is maintained here.</td></tr><tr><td>Manager_Name</td><td>&quot;Manager_1&quot;</td><td>&quot;Manager_1&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Manager_Setup</td><td>/* Power_Table.  First row contains Column Names, expressions valid for entries except Device Name.                                                 \\n                                                                                                                                                    \\n--------Device Name-------  ---------Power States------  -----Operating States------  -----------State Transitions---------  --Speed--  --Exist-- */\\n    Architecture_Block      \t\tActive  Standby  Wait  Idle  Existing   OffState  OnState  t_OnOff      Mhz       Volts   ; \\nArchitecture_1_Module_1_PPC_0         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_1         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_2         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_3         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_4         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_5         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_6         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_7         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_8         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_9         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_10        190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_11        190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_0         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_1         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_2         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_3         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_4         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_5         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_6         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_7         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_8         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_9         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_10         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_11         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\n\\nArchitecture_1_Module_3_PPC_0         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_1         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_2         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_3         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_4         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_5         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_6         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_7         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_8         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_9         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_10         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_11         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\n\\nArchitecture_1_Module_4_PPC_0         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_1         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_2         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_3         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_4         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_5         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_6         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_7         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_8         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_9         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_10         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_11         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SSD                     4.0     50.0e-3     10.0e-3  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SSD2                     4.0     50.0e-3     10.0e-3  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SDRAM_1                 270.0e-3 142.0e-3    20.0e-3   13.0e-3  Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SDRAM_2                 270.0e-3 142.0e-3    20.0e-3   13.0e-3 Standby   Standby   Active   2.0e-9     1000.0     1.0     ;</td><td>/* Power_Table.  First row contains Column Names, expressions valid for entries except Device Name.                                                 \\n                                                                                                                                                    \\n--------Device Name-------  ---------Power States------  -----Operating States------  -----------State Transitions---------  --Speed--  --Exist-- */\\n    Architecture_Block      \t\tActive  Standby  Wait  Idle  Existing   OffState  OnState  t_OnOff      Mhz       Volts   ; \\nArchitecture_1_Module_1_PPC_0         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_1         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_2         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_3         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_4         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_5         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_6         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_7         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_8         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_9         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_10        190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_1_PPC_11        190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_0         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_1         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_2         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_3         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_4         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_5         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_6         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_7         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_8         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_9         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_10         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_2_PPC_11         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\n\\nArchitecture_1_Module_3_PPC_0         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_1         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_2         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_3         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_4         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_5         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_6         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_7         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_8         190.0     20.0     10.0  0.0    Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_9         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_10         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_3_PPC_11         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\n\\nArchitecture_1_Module_4_PPC_0         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_1         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_2         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_3         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_4         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_5         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_6         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_7         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_8         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_9         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_10         190.0     20.0     10.0  0.0     Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_Module_4_PPC_11         190.0     20.0     10.0  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SSD                     4.0     50.0e-3     10.0e-3  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SSD2                     4.0     50.0e-3     10.0e-3  0.0      Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SDRAM_1                 270.0e-3 142.0e-3    20.0e-3   13.0e-3  Standby   Standby   Active   2.0e-9     1000.0     1.0     ;\\nArchitecture_1_SDRAM_2                 270.0e-3 142.0e-3    20.0e-3   13.0e-3 Standby   Standby   Active   2.0e-9     1000.0     1.0     ;</td></tr><tr><td>Async_State_Change</td><td>/* Async_State_Change.  First row contains Column Names, expressions valid for entries except Device Name.                                                 \\n                                                                                                                                                    \\n--------Device Name-------  ------------Time State--------- */\\n    Architecture_Block      State     Time_or_Express  Next ; \\n</td><td>/* Async_State_Change.  First row contains Column Names, expressions valid for entries except Device Name.                                                 \\n                                                                                                                                                    \\n--------Device Name-------  ------------Time State--------- */\\n    Architecture_Block      State     Time_or_Express  Next ; \\n</td></tr><tr><td>Expression_List</td><td>/* First row contains Column Names.                                                                                                                 \\n                                                                                                                                                    \\n---------Reference--------  ------------------------------------Expression----------------------------------------------------------------------- */\\n           Name                                                   Value                                                                           ; \\n</td><td>/* First row contains Column Names.                                                                                                                 \\n                                                                                                                                                    \\n---------Reference--------  ------------------------------------Expression----------------------------------------------------------------------- */\\n           Name                                                   Value                                                                           ; \\n</td></tr><tr><td>Battery_Units</td><td>Watts</td><td>Watts</td></tr><tr><td>State_Plot_Enable</td><td>false</td><td>false</td></tr></table> <h2>Stats</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&quot;Device_Stats&quot;</td><td>&quot;Device_Stats&quot;</td></tr><tr><td>ViewText</td><td>true</td><td>true</td></tr><tr><td>saveText</td><td>false</td><td>false</td></tr><tr><td>fileName</td><td>Enter Filename to save text</td><td>&quot;Enter Filename to save text&quot;</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr></table> <h2>Report</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Power_Manager</td><td>&quot;Manager_1&quot;</td><td>&quot;Manager_1&quot;</td></tr></table> <h2>RIO_IDT_Switch</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>_explanation</td><td>Interfaces and Buses-&gt;RapidIO-&gt;Vendor_RIO-&gt; RIO_IDT_Switch</td><td>Interfaces and Buses-&gt;RapidIO-&gt;Vendor_RIO-&gt; RIO_IDT_Switch</td></tr><tr><td>Sim_Time</td><td>Sim_Time</td><td>1.0E-3</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>RIO_Switch</td><td>&quot;Switch&quot;</td><td>&quot;Switch&quot;</td></tr><tr><td>Power_Manager_Name</td><td>&quot;Manager_2&quot;</td><td>&quot;Manager_2&quot;</td></tr><tr><td>Speed_Mhz</td><td>50000.0</td><td>50000.0</td></tr><tr><td>Overhead_Cycles</td><td>0</td><td>0</td></tr><tr><td>Ingress_Buffer</td><td>5</td><td>5</td></tr><tr><td>Switch_Buffer</td><td>5</td><td>5</td></tr><tr><td>Egress_Buffer</td><td>5</td><td>5</td></tr><tr><td>Bit_Error_Rate</td><td>1.0E-11</td><td>1.0E-11</td></tr><tr><td>Ingress_Watermark_Array</td><td>{2,3,4} /*WM0,WM1,WM2 */</td><td>{2, 3, 4}</td></tr><tr><td>Switch_Watermark_Array</td><td>{3,4,5} /*WM0,WM1,WM2 */</td><td>{3, 4, 5}</td></tr><tr><td>Port_IN_PHY_Lanes</td><td>{2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2}</td><td>{2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}</td></tr><tr><td>Switch_Out_PHY_Lanes</td><td>{2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2}</td><td>{2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2}</td></tr><tr><td>Output_Flow_Control</td><td>{false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false,false}</td><td>{false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false}</td></tr><tr><td>Enable_Messages</td><td>false</td><td>false</td></tr></table> <h2>VariableList</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Memory_Init_Text</td><td>/* Memory Initialize Template          \\nName          Type    Value       */\\nMulticast_1   global  {&quot;SSD2&quot;}   ; \\n\\n</td><td>/* Memory Initialize Template          \\nName          Type    Value       */\\nMulticast_1   global  {&quot;SSD2&quot;}   ; \\n\\n</td></tr></table> <h2>RIO_Routing_Table</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>*.xml, *.csv files abs or rel (./) path\\n  -- *.csv real columns set to number\\nInput_Fields == Lookup_Fields (num, type)\\nOutput_Expr: match, match_last, match_all\\n  -- match_all.field not allowed</td><td>*.xml, *.csv files abs or rel (./) path\\n  -- *.csv real columns set to number\\nInput_Fields == Lookup_Fields (num, type)\\nOutput_Expr: match, match_last, match_all\\n  -- match_all.field not allowed</td></tr><tr><td>Linking_Name</td><td>&quot;RIO_Routing_Table&quot;</td><td>&quot;RIO_Routing_Table&quot;</td></tr><tr><td>fileOrURL</td><td>&nbsp;</td><td>&quot;&quot;</td></tr><tr><td>Data_Structure_Text</td><td>/* Text Template or File Path.  First row contains Field Names. */\\nSwitch   Src                  Des         Port        \\nSwitch   Module_3_PPC_0       SSD2         14\\nSwitch   Module_3_PPC_1       SSD2         14\\nSwitch   Module_3_PPC_2       SSD2         14\\nSwitch   Module_3_PPC_3       SSD2         14\\nSwitch   Module_3_PPC_4       SSD2         14\\nSwitch   Module_3_PPC_5       SSD2         14\\nSwitch   Module_3_PPC_6       SSD2         14\\nSwitch   Module_3_PPC_7       SSD2         14\\nSwitch   Module_3_PPC_8       SSD2         14\\nSwitch   Module_3_PPC_9       SSD2         14\\nSwitch   Module_3_PPC_10      SSD2         14\\nSwitch   Module_3_PPC_11      SSD2         14\\nSwitch    SSD2    Module_3_PPC_0          2\\nSwitch    SSD2    Module_3_PPC_1          2\\nSwitch    SSD2    Module_3_PPC_2          2\\nSwitch    SSD2    Module_3_PPC_3          2\\nSwitch    SSD2    Module_3_PPC_4          2\\nSwitch    SSD2    Module_3_PPC_5          2\\nSwitch    SSD2    Module_3_PPC_6          2\\nSwitch    SSD2    Module_3_PPC_7          2\\nSwitch    SSD2    Module_3_PPC_8          2\\nSwitch    SSD2    Module_3_PPC_9          2\\nSwitch    SSD2    Module_3_PPC_10         2\\nSwitch    SSD2    Module_3_PPC_11         2</td><td>/* Text Template or File Path.  First row contains Field Names. */\\nSwitch   Src                  Des         Port        \\nSwitch   Module_3_PPC_0       SSD2         14\\nSwitch   Module_3_PPC_1       SSD2         14\\nSwitch   Module_3_PPC_2       SSD2         14\\nSwitch   Module_3_PPC_3       SSD2         14\\nSwitch   Module_3_PPC_4       SSD2         14\\nSwitch   Module_3_PPC_5       SSD2         14\\nSwitch   Module_3_PPC_6       SSD2         14\\nSwitch   Module_3_PPC_7       SSD2         14\\nSwitch   Module_3_PPC_8       SSD2         14\\nSwitch   Module_3_PPC_9       SSD2         14\\nSwitch   Module_3_PPC_10      SSD2         14\\nSwitch   Module_3_PPC_11      SSD2         14\\nSwitch    SSD2    Module_3_PPC_0          2\\nSwitch    SSD2    Module_3_PPC_1          2\\nSwitch    SSD2    Module_3_PPC_2          2\\nSwitch    SSD2    Module_3_PPC_3          2\\nSwitch    SSD2    Module_3_PPC_4          2\\nSwitch    SSD2    Module_3_PPC_5          2\\nSwitch    SSD2    Module_3_PPC_6          2\\nSwitch    SSD2    Module_3_PPC_7          2\\nSwitch    SSD2    Module_3_PPC_8          2\\nSwitch    SSD2    Module_3_PPC_9          2\\nSwitch    SSD2    Module_3_PPC_10         2\\nSwitch    SSD2    Module_3_PPC_11         2</td></tr><tr><td>Input_Fields</td><td>&quot;Switch&quot;</td><td>&quot;Switch&quot;</td></tr><tr><td>Lookup_Fields</td><td>&quot;Switch&quot;</td><td>&quot;Switch&quot;</td></tr><tr><td>Output_Expression</td><td>&quot;output = match&quot;</td><td>&quot;output = match&quot;</td></tr><tr><td>Mode</td><td>Read</td><td>Read</td></tr></table> <h2>Cluster_4</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Speed</td><td>3000.0</td><td>3000.0</td></tr><tr><td>Proc_Instance</td><td>12</td><td>12</td></tr><tr><td>Local_Mem_Name</td><td>&quot;SSD2&quot;</td><td>&quot;SSD2&quot;</td></tr><tr><td>Bus_Name_Field</td><td>&quot;Bus_4&quot;</td><td>&quot;Bus_4&quot;</td></tr><tr><td>Bus_Speed</td><td>(Processor_Speed*60.0)/100.0 /*in MHz */</td><td>1800.0</td></tr><tr><td>Memory_Speed</td><td>(Processor_Speed*60.0)/100.0 /* in MHz */</td><td>1800.0</td></tr><tr><td>Module_Name</td><td>&quot;Module_4&quot;</td><td>&quot;Module_4&quot;</td></tr><tr><td>Access_I_Local</td><td>true</td><td>true</td></tr><tr><td>TG_Num</td><td>4</td><td>4</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr></table> <h2>Cluster_3</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Speed</td><td>3000.0</td><td>3000.0</td></tr><tr><td>Proc_Instance</td><td>12</td><td>12</td></tr><tr><td>Local_Mem_Name</td><td>&quot;SSD&quot;</td><td>&quot;SSD&quot;</td></tr><tr><td>Bus_Name_Field</td><td>&quot;Bus_2&quot;</td><td>&quot;Bus_2&quot;</td></tr><tr><td>Bus_Speed</td><td>(Processor_Speed*60.0)/100.0 /*in MHz */</td><td>1800.0</td></tr><tr><td>Memory_Speed</td><td>(Processor_Speed*60.0)/100.0 /* in MHz */</td><td>1800.0</td></tr><tr><td>Module_Name</td><td>&quot;Module_2&quot;</td><td>&quot;Module_2&quot;</td></tr><tr><td>Access_I_Local</td><td>true</td><td>true</td></tr><tr><td>TG_Num</td><td>2</td><td>2</td></tr><tr><td>_flipPortsVertical</td><td>true</td><td>true</td></tr><tr><td>_flipPortsHorizontal</td><td>false</td><td>false</td></tr><tr><td>_rotatePorts</td><td>180</td><td>180</td></tr></table> <h2>Text_Display(Non-Buffered)</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>rowsDisplayed</td><td>10</td><td>10</td></tr><tr><td>columnsDisplayed</td><td>40</td><td>40</td></tr><tr><td>suppressBlankLines</td><td>false</td><td>false</td></tr><tr><td>title</td><td>&nbsp;</td><td>&nbsp;</td></tr><tr><td>ViewText</td><td>true</td><td>true</td></tr><tr><td>saveText</td><td>false</td><td>false</td></tr><tr><td>fileName</td><td>Enter Filename to save text</td><td>&quot;Enter Filename to save text&quot;</td></tr><tr><td>Append_Time</td><td>true</td><td>true</td></tr></table> <h2>Cluster_2</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Speed</td><td>3000.0</td><td>3000.0</td></tr><tr><td>Proc_Instance</td><td>12</td><td>12</td></tr><tr><td>Local_Mem_Name</td><td>&quot;SDRAM_2&quot;</td><td>&quot;SDRAM_2&quot;</td></tr><tr><td>Bus_Name_Field</td><td>&quot;Bus_3&quot;</td><td>&quot;Bus_3&quot;</td></tr><tr><td>Bus_Speed</td><td>(Processor_Speed*60.0)/100.0 /*in MHz */</td><td>1800.0</td></tr><tr><td>Memory_Speed</td><td>(Processor_Speed*60.0)/100.0 /* in MHz */</td><td>1800.0</td></tr><tr><td>Module_Name</td><td>&quot;Module_3&quot;</td><td>&quot;Module_3&quot;</td></tr><tr><td>Access_I_Local</td><td>true</td><td>true</td></tr><tr><td>TG_Num</td><td>3</td><td>3</td></tr></table> <h2>Cluster_1</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Processor_Speed</td><td>3000.0</td><td>3000.0</td></tr><tr><td>Proc_Instance</td><td>12</td><td>12</td></tr><tr><td>Local_Mem_Name</td><td>&quot;SDRAM_1&quot;</td><td>&quot;SDRAM_1&quot;</td></tr><tr><td>Bus_Name_Field</td><td>&quot;Bus_1&quot;</td><td>&quot;Bus_1&quot;</td></tr><tr><td>Bus_Speed</td><td>(Processor_Speed*60.0)/100.0 /*in MHz */</td><td>1800.0</td></tr><tr><td>Memory_Speed</td><td>(Processor_Speed*60.0)/100.0 /* in MHz */</td><td>1800.0</td></tr><tr><td>Module_Name</td><td>&quot;Module_1&quot;</td><td>&quot;Module_1&quot;</td></tr><tr><td>Access_I_Local</td><td>true</td><td>true</td></tr><tr><td>TG_Num</td><td>1</td><td>1</td></tr></table> <h2>ArchitectureSetup</h2><table border="1"><tr><td><b>Parameter</b></td><td><b>Expression</b></td><td><b>Value</b></td></tr><tr><td>Block_Documentation</td><td>Enter User Documentation Here</td><td>Enter User Documentation Here</td></tr><tr><td>Architecture_Name</td><td>&quot;Architecture_1&quot;</td><td>&quot;Architecture_1&quot;</td></tr><tr><td>Field_Name_Mapping</td><td>/* First row contains Column Names.                */\\nExternal_Field_Name          Internal_Field_Name   ; \\nA_Address                    A_Address             ; \\nA_Bytes                      A_Bytes               ; \\nA_Data                       A_Data                ; \\nA_IDX                        A_IDX                 ; \\nA_Instruction                A_Instruction         ; \\nA_Priority                   A_Priority            ; \\nA_Source                     A_Source              ; \\nA_Destination                A_Destination         ; \\nA_Task_ID                    A_Task_ID             ; \\nA_Time                       A_Time                ;</td><td>/* First row contains Column Names.                */\\nExternal_Field_Name          Internal_Field_Name   ; \\nA_Address                    A_Address             ; \\nA_Bytes                      A_Bytes               ; \\nA_Data                       A_Data                ; \\nA_IDX                        A_IDX                 ; \\nA_Instruction                A_Instruction         ; \\nA_Priority                   A_Priority            ; \\nA_Source                     A_Source              ; \\nA_Destination                A_Destination         ; \\nA_Task_ID                    A_Task_ID             ; \\nA_Time                       A_Time                ;</td></tr><tr><td>Routing_Table</td><td>/* First row contains Column Names.                  */\\nSource_Node  Destination_Node  Hop       Source_Port ; \\nProcessor_1  Cache_1           Port_1    output      ; \\nCache_1      Processor_1       Port_2    output      ; \\nCache_1      SDRAM_1           Port_2    output      ; \\nSDRAM_1      Cache_1           Port_4    output      ; \\nSDRAM_1      Processor_1       Port_4    output      ; \\n</td><td>/* First row contains Column Names.                  */\\nSource_Node  Destination_Node  Hop       Source_Port ; \\nProcessor_1  Cache_1           Port_1    output      ; \\nCache_1      Processor_1       Port_2    output      ; \\nCache_1      SDRAM_1           Port_2    output      ; \\nSDRAM_1      Cache_1           Port_4    output      ; \\nSDRAM_1      Processor_1       Port_4    output      ; \\n</td></tr><tr><td>Number_of_Samples</td><td>2</td><td>2</td></tr><tr><td>Statistics_to_Plot</td><td>&quot;Processor_1_PROC_Utilization_Pct_Min, Processor_1_PROC_Utilization_Pct_Mean, Processor_1_PROC_Utilization_Pct_Max&quot;</td><td>&quot;Processor_1_PROC_Utilization_Pct_Min, Processor_1_PROC_Utilization_Pct_Mean, Processor_1_PROC_Utilization_Pct_Max&quot;</td></tr><tr><td>Internal_Plot_Trace_Offset</td><td>2</td><td>2</td></tr><tr><td>Listen_to_Architecture_Options</td><td>None</td><td>None</td></tr></table>

This model was constructed for the paper published at the IEEE Aerospace Conference in 2016.

Please visit the link: https://ieeexplore.ieee.org/document/7500650/

This model has 4 DSP boards that are inter-connected using a RapidIO backplane. The instructions are cached in the local memory while the data has to retrieved across the backbone form another board.